#ifndef __CSP_PCU_H__
#define __CSP_PCU_H__

//#include "AC33Mx128.h"

typedef struct {

	CSP_REGISTER_T		PnMR;				// offset = 0x0000, R/W
	CSP_REGISTER_T		PnCR; 				// offset = 0x0004, R/W
	CSP_REGISTER_T		PnPCR;				// offset = 0x0008, R/W
	CSP_REGISTER_T		PnDER; 				// offset = 0x000C, R/W

	CSP_REGISTER_T		PnIER;				// offset = 0x0010, R/W
	CSP_REGISTER_T		PnISR;				// offset = 0x0014, R/W
	CSP_REGISTER_T		PnICR;				// offset = 0x0018, R/W
	CSP_REGISTER_T		PnDPR;				// offset = 0x001C, R/W

} CSP_PCU_T;


//==========================================================================
// Pin No 
//==========================================================================
#define PIN_0								(0)
#define PIN_1								(1)
#define PIN_2								(2)
#define PIN_3								(3)
#define PIN_4								(4)
#define PIN_5								(5)
#define PIN_6								(6)
#define PIN_7								(7)

#define PIN_8								(8)
#define PIN_9								(9)
#define PIN_10								(10)
#define PIN_11								(11)
#define PIN_12								(12)
#define PIN_13								(13)
#define PIN_14								(14)
#define PIN_15								(15)


//==========================================================================
// Pin Direction 
//==========================================================================
#define PORT_DIR_IN							(1)
#define PORT_DIR_OUT						(0)
#define	PORT_OPEN_DRAIN						(2)
#define	PORT_ANALOG							(3)


//==========================================================================
// 	PnMR
//		
//
//==========================================================================
#define PnMR_FUNC_MASK						(0x03)



//==========================================================================
// 	PAMR
//		
//
//==========================================================================
#define PA0_MUX_PA0							(0x0000<<0)
#define PA0_MUX_AN0							(0x0003<<0)
#define PA0_MUX_COMP0						(0x0003<<0)

#define PA1_MUX_PA1							(0x0000<<2)
#define PA1_MUX_AN1							(0x0003<<2)
#define PA1_MUX_COMP1						(0x0003<<2)

#define PA2_MUX_PA2							(0x0000<<4)
#define PA2_MUX_AN2							(0x0003<<4)
#define PA2_MUX_COMP2						(0x0003<<4)

#define PA3_MUX_PA3							(0x0000<<6)
#define PA3_MUX_AN3							(0x0003<<6)
#define PA3_MUX_COMP3						(0x0003<<6)

#define PA4_MUX_PA4							(0x0000<<8)
#define PA4_MUX_T0O							(0x0002<<8)
#define PA4_MUX_AN4							(0x0003<<8)

#define PA5_MUX_PA5							(0x0000<<10)
#define PA5_MUX_T1O							(0x0002<<10)
#define PA5_MUX_AN5							(0x0003<<10)

#define PA6_MUX_PA6							(0x0000<<12)
#define PA6_MUX_T2O							(0x0002<<12)
#define PA6_MUX_AN6							(0x0003<<12)

#define PA7_MUX_PA7							(0x0000<<14)
#define PA7_MUX_TRACED3						(0x0001<<14)
#define PA7_MUX_T3O							(0x0002<<14)
#define PA7_MUX_AN7							(0x0003<<14)
#define PA7_MUX_CREF0						(0x0003<<14)

#define PA8_MUX_PA8							(0x0000<<16)
#define PA8_MUX_TRACECLK					(0x0001<<16)
#define PA8_MUX_AD0O						(0x0002<<16)
#define PA8_MUX_AN8							(0x0003<<16)

#define PA9_MUX_PA9							(0x0000<<18)
#define PA9_MUX_TRACED0						(0x0001<<18)
#define PA9_MUX_AD1O						(0x0002<<18)
#define PA9_MUX_AN9							(0x0003<<18)

#define PA10_MUX_PA10						(0x0000<<20)
#define PA10_MUX_TRACED1					(0x0001<<20)
#define PA10_MUX_AD2O						(0x0002<<20)
#define PA10_MUX_AN10						(0x0003<<20)

#define PA11_MUX_PA11						(0x0000<<22)
#define PA11_MUX_TRACED2					(0x0001<<22)
#define PA11_MUX_AN11						(0x0003<<22)

#define PA12_MUX_PA12						(0x0000<<24)
#define PA12_MUX_SS0						(0x0001<<24)
#define PA12_MUX_AD2I						(0x0002<<24)
#define PA12_MUX_AN12						(0x0003<<24)

#define PA13_MUX_PA13						(0x0000<<26)
#define PA13_MUX_SCK0						(0x0001<<26)
#define PA13_MUX_AN13						(0x0003<<26)

#define PA14_MUX_PA14						(0x0000<<28)
#define PA14_MUX_MOSI0						(0x0001<<28)
#define PA14_MUX_AN14						(0x0003<<28)

#define PA15_MUX_PA15						(0x0000<<30)
#define PA15_MUX_MISO0						(0x0001<<30)
#define PA15_MUX_T7CO						(0x80000000)//(0x0002<<30)
#define PA15_MUX_AN15						(0xc0000000)//(0x0003<<30)
//==========================================================================
// 	PBMR
//		
//
//==========================================================================
#define PB0_MUX_PB0							(0x0000<<0)
#define PB0_MUX_MPWM0H0						(0x0001<<0)				/****/

#define PB1_MUX_PB1							(0x0000<<2)
#define PB1_MUX_MPWM0L0						(0x0001<<2)				/****/

#define PB2_MUX_PB2							(0x0000<<4)
#define PB2_MUX_MPWM0H1						(0x0001<<4)				/****/

#define PB3_MUX_PB3							(0x0000<<6)
#define PB3_MUX_MPWM0L1						(0x0001<<6)				/****/

#define PB4_MUX_PB4							(0x0000<<8)
#define PB4_MUX_MPWM0H2						(0x0001<<8)
#define PB4_MUX_T9C							(0x0002<<8)

#define PB5_MUX_PB5							(0x0000<<10)
#define PB5_MUX_MPWM0L2						(0x0001<<10)
#define PB5_MUX_T9O							(0x0002<<10)

#define PB6_MUX_PB6							(0x0000<<12)
#define PB6_MUX_EMG00						(0x0001<<12)
#define PB6_MUX_WDTO						(0x0002<<12)

#define PB7_MUX_PB7							(0x0000<<14)
#define PB7_MUX_EMG01						(0x0001<<14)
#define PB7_MUX_STBYO						(0x0002<<14)

#define PB8_MUX_PB8							(0x0000<<16)
#define PB8_MUX_EMG10						(0x0001<<16)			/****/
#define PB8_MUX_RXD3						(0x0002<<16)

#define PB9_MUX_PB9							(0x0000<<18)
#define PB9_MUX_EMG11						(0x0001<<18)			/****/
#define PB9_MUX_TXD3						(0x0002<<18)

#define PB10_MUX_PB10						(0x0000<<20)
#define PB10_MUX_MPWM1H0					(0x0001<<20)			/****/

#define PB11_MUX_PB11						(0x0000<<22)
#define PB11_MUX_MPWM1L0					(0x0001<<22)			/****/

#define PB12_MUX_PB12						(0x0000<<24)
#define PB12_MUX_MPWM1H1					(0x0001<<24)			/****/

#define PB13_MUX_PB13						(0x0000<<26)
#define PB13_MUX_MPWM1L1					(0x0001<<26)			/****/

#define PB14_MUX_PB14						(0x0000<<28)
#define PB14_MUX_MPWM1H2					(0x0001<<28)			/****/

#define PB15_MUX_PB15						(0x0000<<30)
#define PB15_MUX_MPWM1L2					(0x0001<<30)			/****/


//==========================================================================
// 	PCMR
//		
//
//==========================================================================
#define PC0_MUX_PC0							(0x0000<<0)
#define PC0_MUX_TCK							(0x0001<<0)				
#define PC0_MUX_SWCLK						(0x0001<<0)

#define PC1_MUX_PC1							(0x0000<<2)
#define PC1_MUX_TMS							(0x0001<<2)			
#define PC1_MUX_SWDIO						(0x0001<<2)

#define PC2_MUX_PC2							(0x0000<<4)
#define PC2_MUX_TDO							(0x0001<<4)				
#define PC2_MUX_SWO							(0x0001<<4)

#define PC3_MUX_PC3							(0x0000<<6)
#define PC3_MUX_TDI							(0x0001<<6)				

#define PC4_MUX_PC4							(0x0000<<8)
#define PC4_MUX_nTRST						(0x0001<<8)
#define PC4_MUX_T0C							(0x0002<<8)
#define PC4_MUX_PHA							(0x0002<<8)

#define PC5_MUX_PC5							(0x0000<<10)
#define PC5_MUX_RXD1						(0x0001<<10)
#define PC5_MUX_T1C							(0x0002<<10)
#define PC5_MUX_PHB							(0x0002<<10)

#define PC6_MUX_PC6							(0x0000<<12)
#define PC6_MUX_TXD1						(0x0001<<12)
#define PC6_MUX_T2C							(0x0002<<12)
#define PC6_MUX_PHZ							(0x0002<<12)

#define PC7_MUX_PC7							(0x0000<<14)
#define PC7_MUX_SCL0						(0x0001<<14)
#define PC7_MUX_T3C							(0x0003<<14)

#define PC8_MUX_PC8							(0x0000<<16)
#define PC8_MUX_SDA0						(0x0001<<16)

#define PC9_MUX_PC9							(0x0000<<18)
#define PC9_MUX_CLKO						(0x0001<<18)

#define PC10_MUX_PC10						(0x0000<<20)
#define PC10_MUX_nRESET						(0x0001<<20)

#define PC11_MUX_PC11						(0x0000<<22)

#define PC12_MUX_PC12						(0x0000<<24)
#define PC12_MUX_XIN						(0x0001<<24)

#define PC13_MUX_PC13						(0x0000<<26)
#define PC13_MUX_XOUT						(0x0001<<26)

#define PC14_MUX_PC14						(0x0000<<28)
#define PC14_MUX_RXD0						(0x0001<<28)
#define PC14_MUX_T8C						(0x0002<<28)

#define PC15_MUX_PC15						(0x0000<<30)
#define PC15_MUX_TXD0						(0x0001<<30)
#define PC15_MUX_T8O						(0x80000000)//(0x0002<<30)

//==========================================================================
// 	PDMR
//		
//
//==========================================================================
#define PD0_MUX_PD0							(0x0000<<0)
#define PD0_MUX_SS1							(0x0001<<0)				

#define PD1_MUX_PD1							(0x0000<<2)
#define PD1_MUX_SCK1						(0x0001<<2)			

#define PD2_MUX_PD2							(0x0000<<4)
#define PD2_MUX_MOSI1						(0x0001<<4)				

#define PD3_MUX_PD3							(0x0000<<6)
#define PD3_MUX_MISO1						(0x0001<<6)				

#define PD4_MUX_PD4							(0x0000<<8)
#define PD4_MUX_SCL1						(0x0001<<8)

#define PD5_MUX_PD5							(0x0000<<10)
#define PD5_MUX_SDA1						(0x0001<<10)

#define PD6_MUX_PD6							(0x0000<<12)
#define PD6_MUX_TXD2						(0x0001<<12)
#define PD6_MUX_AD0I						(0x0002<<12)

#define PD7_MUX_PD7							(0x0000<<14)
#define PD7_MUX_RXD2						(0x0001<<14)
#define PD7_MUX_AD1I						(0x0002<<14)

#define PD8_MUX_PD8							(0x0000<<16)
#define PD8_MUX_WDTO						(0x0002<<16)

#define PD9_MUX_PD9							(0x0000<<18)
#define PD9_MUX_STBYO						(0x0002<<18)

#define PD10_MUX_PD10						(0x0000<<20)
#define PD10_MUX_MISO0						(0x0001<<20)

#define PD11_MUX_PD11						(0x0000<<22)
#define PD11_MUX_MISO0						(0x0001<<22)

#define PD12_MUX_PD12						(0x0000<<24)
#define PD12_MUX_MISO0						(0x0001<<24)

#define PD13_MUX_PD13						(0x0000<<26)
#define PD13_MUX_MISO0						(0x0001<<26)

#define PD14_MUX_PD14						(0x0000<<28)
#define PD14_MUX_MISO0						(0x0001<<28)

#define PD15_MUX_PD15						(0x0000<<30)
#define PD15_MUX_MISO0						(0x0001<<30)




//==========================================================================
// 	PnCR
//		
//
//==========================================================================
#define PnCR_OUTPUT_PUSH_PULL				(0x00)
#define PnCR_OUTPUT_OPEN_DRAIN				(0x01)
#define PnCR_INPUT_LOGIC					(0x02)
#define PnCR_INPUT_ANALOG					(0x03)

#define PnCR_MASK							(0x03)



//==========================================================================
// 	PnPCR
//		
//
//==========================================================================
#define PnPCR_PULLUP_DISABLE				(0x00)
#define PnPCR_PULLUP_ENABLE					(0x01)



//==========================================================================
// 	PnDER
//		
//
//				PADER		0x4000_100C

//
//==========================================================================
#define PnDER_DEBOUNCE_DISABLE				(0x00)
#define PnDER_DEBOUNCE_ENABLE				(0x01)



//==========================================================================
// 	PnIER
//		
//
//==========================================================================
#define PnIER_INTR_DISABLE					(0x00)
#define PnIER_LEVEL_TRIG					(0x01)
#define PnIER_EDGE_TRIG						(0x03)



//==========================================================================
// 	PnISR
//		
//
//==========================================================================
#define PnISR_MASK							(0x03)


//==========================================================================
// 	PnICR
//		
//
//==========================================================================
#define PnICR_LOW_LEVEL_FALLING_EDGE		(0x01)
#define PnICR_HIGH_LEVEL_RISING_EDGE		(0x02)
#define PnICR_BOTH_RISING_FALLING_EDGE		(0x03)



//==========================================================================
// 	PnIER/PnICR (composite)
//		
//
//					bit [0:3]			level, edge
//					bit [7:4]			low/falling, high/rising, both
//
//==========================================================================
#define PCU_NO_INTR							(0x00)
#define PCU_LOW_LEVEL_INTR					(0x11)
#define PCU_HIGH_LEVEL_INTR					(0x21)

#define PCU_FALLING_EDGE_INTR				(0x13)
#define PCU_RISING_EDGE_INTR				(0x23)
#define PCU_BOTH_FALLING_RISING_EDGE_INTR	(0x33)



//==========================================================================
// 	PDPR
//		
//
//==========================================================================





//==========================================================================
// 
//		M A C R O S
//
//==========================================================================
#define CSP_PCU_GET_PnMR(pcu)					((pcu)->PnMR)
#define CSP_PCU_SET_PnMR(pcu, val)				((pcu)->PnMR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnCR(pcu)					((pcu)->PnCR)
#define CSP_PCU_SET_PnCR(pcu, val)				((pcu)->PnCR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnPCR(pcu)					((pcu)->PnPCR)
#define CSP_PCU_SET_PnPCR(pcu, val)				((pcu)->PnPCR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnDER(pcu)					((pcu)->PnDER)
#define CSP_PCU_SET_PnDER(pcu, val)				((pcu)->PnDER = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnIER(pcu)					((pcu)->PnIER)
#define CSP_PCU_SET_PnIER(pcu, val)				((pcu)->PnIER = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnISR(pcu)					((pcu)->PnISR)
#define CSP_PCU_SET_PnISR(pcu, val)				((pcu)->PnISR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnICR(pcu)					((pcu)->PnICR)
#define CSP_PCU_SET_PnICR(pcu, val)				((pcu)->PnICR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_GET_PnDPR(pcu)					((pcu)->PnDPR)
#define CSP_PCU_SET_PnDPR(pcu, val)				((pcu)->PnDPR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_PCU_SET_PORTEN(val)					(PCU_PORTEN = (val))
//-----------------------------------------------------------------------------------------

// PCU
extern CSP_PCU_T			* const			PCU_A; 
extern CSP_PCU_T			* const			PCU_B; 
extern CSP_PCU_T			* const			PCU_C; 
extern CSP_PCU_T			* const			PCU_D; 
#define	PCU_PORTEN			(*(CSP_REGISTER_T *) PCU_PORTEN_ADDRESS)







//==========================================================================
// 
//		F U N C T I O N    D E C L A R A T I O N S 
//
//==========================================================================
void CSP_PCU_Init (void); 
void CSP_PCU_ConfigureFunction (CSP_PCU_T * const pcu, UINT32 pin_no, UINT32 func); 
void CSP_PCU_Set_Direction_Type (CSP_PCU_T * const pcu, UINT32 pin_no, UINT32 dir_type); 
void CSP_PCU_ConfigurePullup (CSP_PCU_T * const pcu, UINT32 pin_no, UINT32 pullup); 

void CSP_PCU_ConfigureInterrupt (CSP_PCU_T * const pcu, UINT32 pin_no, UINT32 intr_mask, UINT32 enable); 

void	CSP_PCU_AccessEnable(void);
void	CSP_PCU_AccessDisable(void);

#endif 

